The present disclosure relates generally an integrated circuit device and, more particularly, a transistor having an alternating-doping profile for a device feature of the transistor.
High-voltage transistors (HVMOS transistors) often include double-diffused drains (DDD) as a device feature (e.g., source/drain) of the transistor. The DDD may, for example, prevent electrostatic discharge (ESD) and/or reduce hot electron carrier effects.
However, conventional DDD may be disadvantageous in that they require a high dosage of impurities (e.g., dopants). These can in turn induce DDD MOS gate induced drain leakage (GIDL) which may be of particular concern as gate lengths shorten. GIDL current is generated in the drain region of the transistor that overlaps with the gate electrode. GIDL current is generated because of the high electric field which is induced between the gate electrode (which may be at ground) and the drain (which a high voltage may be applied to). A greater GIDL is disadvantageous in that it will lower the threshold voltage of the device.
Therefore, what is needed is an improved structure for a FET device.